1. Field of the Invention
This invention relates to a method of manufacturing a semiconductor device on a silicon carbide substrate having a prescribed crystal plane orientation. It particularly relates to a method of manufacturing a semiconductor device that uses a gate insulation layer, such as a metal-oxide semiconductor (MOS) capacitor or a MOS field-effect transistor (MOSFET).
2. Description of the Prior Art
The interface-trap density of an oxide-silicon carbide interface using a silicon carbide (SiC) substrate is roughly ten times higher than that of a silicon MOS transistor. This gives rise to the problem that a SiC substrate based MOSFET has a lower channel mobility than a silicon substrate based MOSFET. In particular, a bulk SiC substrate having the crystal structure referred to as 4H-SiC has about twice the channel mobility of a bulk SiC substrate having the crystal structure referred to as 6H-SiC, so it should be possible to utilize this to lower the on-resistance of a power MOSFET. However, a 4H-SiC oxide/SiC interface has more defects (a higher interface-trap density) than a 6H-SiC one, and as a result, the 4H-SiC structure has a lower channel mobility. Therefore, in order to realize a SiC MOSFET having a low on-resistance, it is critically important to reduce the interface-trap density of a 4H-SiC MOS structure. A SiC MOSFET formed on the (0001) face usually has a channel mobility of not more than 10 cm2/Vs.
There are reports of the channel mobility being improved to 30 cm2/Vs by reducing the interface-trap density by using H2O (water) to form a gate insulation layer on the (11-20) face of the SiC. It is already known that using the (11-20) face is more advantageous than using the (0001) face. However, this is still not enough, since a channel mobility of 100 cm2/Vs or more is required to reduce the SiC power MOSFET on-resistance to the theoretical value.
This being the case, efforts have focused on improving the interface between the semiconductor substrate and the gate insulation layer. In most cases, such efforts involve using heat treatment to reduce the interface-trap density. As described below, a number of disclosures have been made relating to the method of oxidizing the SiC substrate and the heat-treatment method used following the oxidation.
JP-A HEI 9-199497, for example, discloses a method of improving a thermal oxidation film of a SiC single-crystal substrate by following the oxidation step with an annealing step using hydrogen and an annealing step using inert gas, to thereby reduce hysteresis and flat band-shift. In particular, this publication describes a method in which the SiC oxidation is followed by hydrogen annealing at 1000xc2x0 C. This method relates to the (0001) face of a SiC substrate; the disclosure does not describe a method relating to the (11-20) face. Moreover, a temperature of 1000xc2x0 C. is too high, with the oxidation layer being reduced by the hydrogen, degrading the reliability of a device in which the oxidation layer is used as a gate oxidation layer.
JP-A HEI 10-112460 discloses a SiC semiconductor device fabrication method in which, to reduce the interface-trap density after forming a thermal oxidation layer, the thermal oxidation layer is subjected to less than two hours of annealing in an inert gas atmosphere and heat-treated at a low temperature of 300xc2x0 C. to 500xc2x0 C. in hydrogen or a gas, such as water vapor, containing hydrogen atoms. This is then followed by a cooling period, at least part of which takes place in a gaseous atmosphere containing hydrogen atoms. So, the publication specifically describes a method in which the gate oxidation layer is formed and heat-treated at 300xc2x0 C. to 500xc2x0 C. in an atmosphere containing hydrogen atoms, but it is a method that relates to the (0001) face of a SiC substrate, and contains no description relating to the (11-20) face. Also, the heat treatment temperature within the range 300xc2x0 C. to 500xc2x0 C. is too low for adequate heat-treatment.
JP-A HEI 11-31691 discloses a method of forming a thermal oxidation layer in a SiC semiconductor device in which, in order to reduce the interface-trap density after forming the layer, (1) in a method of forming a thermal oxidation layer in which the silicon dioxide is grown by a pyrogenic oxidation process that performs thermal oxidation introducing hydrogen and oxygen, a hydrogen-oxygen mixture is used, in which there is more oxygen than hydrogen, or (2) after oxidation, cooling is conducted in an atmosphere containing hydrogen atoms using a cooling rate within the range 0.3 to 3xc2x0 C./min, or (3) after oxidation and cooling, extraction is effected at a temperature of not more than 900xc2x0 C. While the disclosure does describe a method of cooling in an atmosphere containing hydrogen after the pyrogenic oxidation, it is a method that relates to the (0001) face of a SiC substrate, and does not describe the method with respect to the (11-20) face. Also, the described mixture ratio of hydrogen arid oxygen used in the pyrogenic method is not optimal.
JP-A 2000-252461 describes a semiconductor device fabrication method in which one, or two or more oxide and/or nitride gate insulation layers are formed on at least the topmost layer of a SiC semiconductor substrate and then annealed at 600xc2x0 C. to 1600xc2x0 C. in an atmosphere containing hydrogen. In this method, a good gate insulation layer-SiC interface able to adequately stand up to actual use can be obtained by using hydrogen to terminate silicon or carbon dangling bonds that exist in the interface to thereby adequately reduce the interface-trap density. While the disclosure does describe the use of heat-treatment in hydrogen after forming the oxide layer on the SiC substrate, the method relates to the (0001) face of a SiC substrate and is not described with reference to the (11-20) face.
JP-A HEI 7-131016 relates to a field-effect transistor formed of hexagonal SiC crystal having a high power conversion capacity and to a method for manufacturing the transistor, in which the high power conversion capacity is attained by reducing the leakage current between the source and the drain when the gate voltage is off and reducing the electrical resistance when the gate voltage is on. For this, the main current flow path, meaning the current flow between source and drain in the case of a field-effect transistor, is formed parallel to the (0001) face and the channel formation surface is formed parallel to the (11-20) face. While the disclosure does describe the fabrication of a MOSFET structure characterized by the channel formation surface being parallel to the (11-20) face of hexagonal single-crystal SiC substrate, it does not describe a method of forming the gate oxidation layer of a MOSFET.
United States of America Patent (U.S. Pat. No. 5,972,801) discloses a method of improving the performance of an oxide-based device by obtaining an improved oxide layer. The method reduces defects in the oxide layer on the SiC substrate by using a process in which the oxide layer is exposed to an oxidizing atmosphere at a temperature that is not high enough to cause further oxidation of the SiC substrate but is high enough for diffusing the oxidation source gas within the oxides, and for a time that is not long enough to cause further oxidation of the SiC substrate but is long enough to enhance the characteristics of the interface between the oxidation layer and the substrate by increasing the density of the oxidation layer. The disclosure describes a method of processing the formed gate oxidation layer at 600xc2x0 C. to 1000xc2x0 C. in an atmosphere containing H2O (water), but in this case the H2O used is not formed by the combustion of H2 and O2, but is H2O vapor produced by heating pure water. Moreover, the method as described does not relate to formation of a gate oxidation layer on the (11-20) face followed by heat-treatment.
Thus, SiC MOSFETs have usually been formed on the (0001) face, but the channel mobility of such devices has not exceeded 10 cm2/Vs. Also, the literature contains examples of channel mobility being improved to 30 cm2/Vs by reducing the interface-trap density by using H2O (water) to form a gate oxidation layer on the (11-20) face of the SiC, and it is known that it is more advantageous to use the (11-20) face than the (0001) face. The (0001) and (000-1) faces are typical SiC faces. The (0001) face is also called the Si face and the (000-1) face is also called the C face. The oxidation rate in the case of the (000-1) face is approximately ten times higher than that in the case of the (0001) face. The properties of the (11-20) face are midway between the Si face and the C face, and is also more or less midway between the Si and C faces in terms of oxidation rate. Therefore, in the case of the (11-20) face, it is necessary to optimize the oxidation conditions and post-oxidation annealing conditions.
In view of the above, an object of the present invention is to provide a SiC semiconductor device using a SiC substrate with an orientation of the (11-20) face superior to the (0001) face, in which the device is given high channel mobility by optimizing the method of heat-treatment used following gate oxidation.
The first gist of the present invention to attain the above object is to provide a method of manufacturing a semiconductor device relating particularly to heat treatment that follows formation of a gate insulation layer, and comprising a step of forming a gate insulation layer on a semiconductor region formed of SiC having an (11-20) face orientation, a step of forming a gate electrode on the gate insulation layer, a step of forming an electrode on the semiconductor region, a step of cleaning the semiconductor region surface, a step of forming a gate insulation layer, and a step of reducing interface-trap density of an interface between the gate insulation layer and the semiconductor region by following the forming of the gate insulation layer by heat-treatment in an atmosphere containing not less than 1% of H2 (hydrogen) or H2O (water).
The second gist of the invention is to provide a method of manufacturing a semiconductor device relating particularly to heat treatment that follows formation of a gate insulation layer, wherein in addition to the first gist, the atmosphere containing H2 (hydrogen) can be a mixture of H2 (hydrogen) and inert gas in which the H2 (hydrogen) has a predetermined concentration of from 1% to 100%.
The third gist of the invention is to provide a method of manufacturing a semiconductor device relating particularly to heat treatment that follows formation of a gate insulation layer, wherein in addition to the first gist, the atmosphere containing H2O (water) can be a mixture of H2O (water) and inert gas in which the H2O (water) has a predetermined concentration of from 1% to 100%
The fourth gist of the invention is to include, in addition to the first, second or third gist, a heat treatment step carried out in an inert gas atmosphere for a predetermined time at a predetermined temperature between the step of forming a gate insulation layer and the step of heat-treatment in an atmosphere containing H2 (hydrogen) gas or H2O (water) vapor.
The fifth gist of the invention is that in addition to any one of the first gist to fourth gist, the heat-treatment step carried out in an atmosphere containing H2O (water) vapor following the step of forming the gate insulation layer can be one carried out for a predetermined time at a predetermined temperature of from 650xc2x0 C. to 950xc2x0 C.
The sixth gist of the invention is that in addition to the first gist to the fifth gist, the gate insulation layer can be formed by the semiconductor substrate thermal oxidation method
The seventh gist of the invention is that in addition to the sixth gist, the semiconductor substrate thermal oxidation method can be carried out in an atmosphere containing H2O (water) vapor.
The eighth gist of the invention its that in addition to the seventh gist, the atmosphere containing H2O can be comprised of H2O, oxygen and inert gas in which the H2O has a predetermined concentration of from 1% to 100%.
The ninth gist of the invention is that in addition to any one of the first gist to the fifth gist, or either the seventh gist or the eighth gist, the H2O (water) vapor can be produced by reacting H2 (hydrogen) gas and O2 (oxygen) gas in the atmosphere in which the semiconductor substrate is placed.
The tenth gist of the invention is that in addition to the ninth gist, the ratio [O2]/[H2] between a flow rate [H2] of H2 (hydrogen) gas and a flow rate [O2] of O2 (oxygen) gas can be within a predetermined range of from 0.1 to 100.
The eleventh gist of the invention is that in addition to any one of the first gist to the tenth gist, the semiconductor substrate oxidation temperature can be in a predetermined range of from 1000xc2x0 C. to 1250xc2x0 C.
The twelfth gist of the invention is that in addition to any one of the sixth gist to the eleventh gist, when, following gate oxidation layer formation by thermal oxidation of the semiconductor substrate, the substrate is heat-treated in an atmosphere containing H2O, the heat treatment can be carried out at a temperature that is lower than the temperature at which the gate oxidation layer was formed, increasing the thickness of the gate oxidation layer.
The thirteenth gist of the invention is that in addition to any one of the first gist to the twelfth gist, the temperature at which the heat treatment is carried out in an atmosphere containing H2 (hydrogen) can be in a predetermined range of from 600xc2x0 C. to 900xc2x0 C.
The fourteenth gist of the invention is that in addition to any one of the first gist to the thirteenth gist, formation of the gate insulation layer and the following heat treatment in an atmosphere of H2 (hydrogen) gas, H2O (water) vapor or inert gas can be carried out as a continuous process inside an apparatus shut off from the outside air.
The fifteenth gist of the invention is that in addition to any one of the first gist to the fourteenth gist, the step of cleaning the surface of the semiconductor region can include a step of using ultraviolet irradiation to clean the semiconductor region placed in an ozone atmosphere.
The sixteenth gist of the invention is that in addition to any one of the first gist to the fifteenth gist, the step of cleaning the surface of the semiconductor region can also include a step of cleaning by heat treatment in a H2 (hydrogen) atmosphere.
The seventeenth gist of the invention is that in addition to the sixteenth gist, the step of cleaning the surface of the semiconductor region can also include a step of using ultraviolet irradiation to clean the semiconductor region placed in an ozone atmosphere, followed by a step of cleaning the semiconductor region by heat treatment in a H2 (hydrogen) atmosphere.
The eighteenth gist of the invention is that in addition to any one of the first gist to the seventeenth gist, the method of manufacturing a semiconductor device can also include a step of etching the semiconductor surface, using an (11-20) face formed by etching an (0001) face perpendicularly to the depth direction.
The nineteenth gist of the invention is that in addition to the steps included in any one of the first gist to the eighteenth gist of the above method of manufacturing a semiconductor device can also include a step of forming inter-layer insulation layer, a step of forming a wiring layer and a step of forming an insulation layer that protects the wiring layer.
The twentieth gist of the invention is that in addition to any one of the first gist to the nineteenth gist, the heat treatment in an atmosphere containing H2 (hydrogen) can be carried out after forming a gate electrode film on a layer that is higher than the gate insulation layer.
The twenty-first gist of the invention is that in or in addition to any one of the first gist to the twentieth gist, the method can also include a step of heat-treating in an atmosphere containing H2 (hydrogen), and this can also be followed by a step of heat-treating in an inert gas atmosphere at up to 600xc2x0 C.